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[HIP] [CK] [FlyDSL] Remove obsolete availability helpers - #5116

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[HIP] [CK] [FlyDSL] Remove obsolete availability helpers#5116
coderfeli wants to merge 7 commits into
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remove-flydsl-utils-main

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@coderfeli coderfeli commented Aug 30, 2026

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Summary

  • Remove is_flydsl_available, obsolete FlyDSL import fallbacks, and the duplicated aiter.ops.flydsl.utils layer now that FlyDSL is required; preserve lazy public imports for unsupported architectures.
  • Centralize architecture LDS limits in aiter.jit.utils.chip_info; tuners and capacity checks no longer depend on retired flydsl.utils.smem_allocator metadata/check APIs.
  • Move the GDR tuned CSV and MXFP4 v2 tuner helper into their canonical directories; delete unreferenced legacy config data.
  • Move and standardize the GDR decode and split-K HGEMM tests under top-level op_tests/ so standard CI discovers them.
  • Drop the redundant standalone A4W4 test; op_tests/test_moe_2stage.py -q 4 already covers the production path and isolated stage1/stage2 timing.

Compatibility

  • Intentionally removes the obsolete public is_flydsl_available probe and unused buffer_ops.extract_base_index export.
  • Semantic flydsl_config is None checks remain because they detect stale tuned CSV kernel names, not import failures.
  • Guards remain only for genuinely optional external components such as Mori, VLLM, and optional HIP helpers.
  • Legacy SmemAllocator/SmemPtr kernel migrations are deferred to a separate structural follow-up.

Test plan

  • python3 -m compileall -q aiter op_tests csrc
  • Ruff, Black, IDE lints, and git diff --check
  • Related pytest suites pass on gfx950, including GDR, split-K, MLA dispatch, causal-conv, tuner guards, GEMM padding, and FlyDSL prefill smoke
  • test_moe_2stage.py -q 4 A4W4 production path passes and reports stage1/stage2 timing
  • Fresh-process tuned GEMM and fused MoE imports work without import-order errors
  • gfx90a can import aiter.fused_moe and lazily import flydsl_hgemm
  • Affected tuner CLIs start and LDS capacity normalization is validated

coderfeli and others added 2 commits August 30, 2026 02:34
Use FlyDSL's shared-memory metadata directly and keep configs, tuner helpers, and tests in their canonical directories.

Co-authored-by: Cursor <cursoragent@cursor.com>
Add benchmark metrics, correctness checks, reproducible sweeps, and markdown summaries to the relocated FlyDSL tests.

Co-authored-by: Cursor <cursoragent@cursor.com>
@coderfeli
coderfeli requested a review from a team August 30, 2026 02:35
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🏷️ CI Guide

Runs automatically on every PR:

  • ✅ Pre-checks (submodule verification, code formatting)
  • ✅ Aiter op tests (gfx942 + gfx950)
  • ✅ Triton tests on MI35X (only when aiter/ops/triton/** or related paths are changed)

Extended tests (opt-in via labels):

Label Tests
ci:gfx1250-ffm-triton Run the five-shard gfx1250 FFM Triton test suite
ci:triton-300x Run an additional Triton test job on MI300X in PRs; main branch always runs both MI35X and MI300X
multigpu Aiter multi-GPU tests on the 8-GPU runner
ci:sglang SGLang integration tests: DeepSeek-R1-MXFP4 accuracy, Qwen 3.5 accuracy
ci:atom ATOM benchmark: DeepSeek-R1-0528, GPT-OSS-120B
ci:atom_full ATOM accuracy suite for PR and main models from ATOM models_accuracy.json
ci:vllm vLLM benchmark: GPT-OSS-120B, DeepSeek-R1-0528, Kimi-K2.5
ci:all All standard extended tests (excludes ci:atom_full)

Only add ci:atom_full for FlyDSL or Triton upgrades.
Add labels via the sidebar or gh pr edit 5116 --add-label <label>

PR title tags:
Component tags ([Triton/Gluon], [HIP], [CK], [ASM], ...) are added to the PR title automatically from the changed files and re-synced on every push — change-type tags like [fix]/[Perf] and op tags like [MLA] are left untouched. Add the no-auto-title label to opt this PR out of title tagging.

@github-actions github-actions Bot changed the title [FlyDSL] Remove obsolete availability helpers [HIP] [CK] [FlyDSL] Remove obsolete availability helpers Aug 30, 2026
Keep unsupported-arch imports lazy, make tuned GEMM imports explicit, and ensure relocated tests are discovered and reject degenerate outputs.

Co-authored-by: Cursor <cursoragent@cursor.com>
@coderfeli

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@valarLip @amd-ruitang3 This cleanup removes obsolete FlyDSL availability gates across fused_moe/tuned_gemm and adds a jit-core config path; review fixes now preserve unsupported-arch imports and explicit lazy dispatch. Please provide explicit owner sign-off before merge.

coderfeli and others added 3 commits August 30, 2026 03:29
Load MoE kernels explicitly on demand and tighten remaining architecture and benchmark input validation.

Co-authored-by: Cursor <cursoragent@cursor.com>
Centralize architecture LDS limits in chip_info so tuners and capacity checks no longer depend on FlyDSL's legacy allocator module.

Co-authored-by: Cursor <cursoragent@cursor.com>
Import required FlyDSL modules directly while retaining semantic catalog checks and guards for genuinely optional external dependencies.

Co-authored-by: Cursor <cursoragent@cursor.com>
@coderfeli

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Follow-up cleanup: required FlyDSL modules are now imported directly; obsolete import/None availability fallbacks were removed. Semantic flydsl_config is None checks remain intentionally because they detect stale tuned CSV kernel names, not import failures. Guards for optional Mori/VLLM/HIP components remain.

Use the existing production-path MoE 2-stage coverage instead of maintaining a second low-level A4W4 test matrix.

Co-authored-by: Cursor <cursoragent@cursor.com>
@zufayu
zufayu requested a review from yadaish August 31, 2026 01:17
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